On 04/12/17 17:44, Bartosz Golaszewski wrote:
Stride is there to enforce address alignment. As long as there is no issue on addresses aligned to 1 byte on at24 I do not see any issue with the patch.at24->nvmem_config.priv = at24; - at24->nvmem_config.stride = 4; + at24->nvmem_config.stride = 1; at24->nvmem_config.word_size = 1; at24->nvmem_config.size = chip.byte_len; -- 2.7.4I can't find any documentation on what the stride config option does in nvmem, but looking at the code it's only used for alignment checks in nvmem core, so this patch should be ok. Still: I'm wondering if it shouldn't depend on the size of the eeprom or if we shouldn't make the chip you're using a special case. @David: what is the chip you're using? Is it an at24mac402 by any chance? Were you affected by the read problem we fixed recently[1][2] in at24? @Srinivas: any comments on that?
Thanks, srini

