On 2017/12/14 11:38, Lu Baolu wrote: > Hi, > > On 12/14/2017 11:10 AM, Bob Liu wrote: >> On 2017/12/14 9:02, Lu Baolu wrote: >>>> From: Huang Ying <ying.hu...@intel.com> >>>> >>>> Shared Virtual Memory (SVM) allows a kernel memory mapping to be >>>> shared between CPU and and a device which requested a supervisor >>>> PASID. Both devices and IOMMU units have TLBs that cache entries >>>> from CPU's page tables. We need to get a chance to flush them at >>>> the same time when we flush the CPU TLBs. >>>> >>>> We already have an existing MMU notifiers for userspace updates, >>>> however we lack the same thing for kernel page table updates. To >> Sorry, I didn't get which situation need this notification. >> Could you please describe the full scenario? > > Okay. > > 1. When an SVM capable driver calls intel_svm_bind_mm() with > SVM_FLAG_SUPERVISOR_MODE set in the @flags, the kernel > memory page mappings will be shared between CPUs and > the DMA remapping agent (a.k.a. IOMMU). The page table > entries will also be cached in both IOTLB (located in IOMMU) > and the DEVTLB (located in device). >
But who/what kind of real device has the requirement to access a kernel VA? Looks like SVM_FLAG_SUPERVISOR_MODE is used by nobody? Cheers, Liubo > 2. When vmalloc/vfree interfaces are called, the page mappings > for kernel memory might get changed. And current code calls > flush_tlb_kernel_range() to flush CPU TLBs only. The IOTLB or > DevTLB will be stale compared to that on the cpu for kernel > mappings. > > We need a kernel mmu notification to flush TLBs in IOMMU and > devices as well. > > Best regards, > Lu Baolu >
