On 12/15/17 00:47, Jerome Brunet wrote: > On Mon, 2017-12-11 at 22:13 +0800, Yixun Lan wrote: >> Switch the uart_ao pclk to CLK81 since the clock driver is ready. >> Also move the clock info to the board.dts instead in the soc.dtsi. > > Same comment as for ethmac, is it really wise ? > Isn't the clock setup the same for the axg family ? > HI Jerome: yes, should be same for AXG family
HI Kevin: could you take the patch [5/6]? then I just need to resend for this one Yixun
