On 1/12/2018 7:53 PM, Dan Williams wrote: > On Fri, Jan 12, 2018 at 5:07 PM, Tom Lendacky <thomas.lenda...@amd.com> wrote: >> The pause instruction is currently used in the retpoline and RSB filling >> macros as a speculation trap. The use of pause was originally suggested >> because it showed a very, very small difference in the amount of >> cycles/time used to execute the retpoline as compared to lfence. On AMD, >> the pause instruction is not a serializing instruction, so the pause/jmp >> loop will use excess power as it is speculated over waiting for return >> to mispredict to the correct target. >> >> The RSB filling macro is applicable to AMD, and, if software is unable to >> verify that lfence is serializing on AMD (possible when running under a >> hypervisor), the generic retpoline support will be used and, so, is also >> applicable to AMD. Change the use of pause to lfence. > > Should we use ASM_IFENCE for this?
I don't think we need to. On bare-metal this will be fine. When running as a guest, the hypervisor should have made lfence serializing, and if it hasn't, this is still better then pause. Thanks, Tom >
