On Thu, Jan 25, 2018 at 09:23:09AM +0000, David Woodhouse wrote:
> Expose indirect_branch_prediction_barrier() for use in subsequent patches.
>
> [karahmed: remove the special-casing of skylake for using IBPB (wtf?),
> switch to using ALTERNATIVES instead of static_cpu_has]
> [dwmw2: set up ax/cx/dx in the asm too so it gets NOP'd out]
>
> Signed-off-by: Thomas Gleixner <[email protected]>
> Signed-off-by: KarimAllah Ahmed <[email protected]>
> Signed-off-by: David Woodhouse <[email protected]>
> ---
> arch/x86/include/asm/cpufeatures.h | 1 +
> arch/x86/include/asm/nospec-branch.h | 13 +++++++++++++
> arch/x86/kernel/cpu/bugs.c | 7 +++++++
> 3 files changed, 21 insertions(+)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h
> b/arch/x86/include/asm/cpufeatures.h
> index ae3212f..6b988278 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -207,6 +207,7 @@
> #define X86_FEATURE_RETPOLINE_AMD ( 7*32+13) /* AMD Retpoline mitigation
> for Spectre variant 2 */
> #define X86_FEATURE_INTEL_PPIN ( 7*32+14) /* Intel Processor
> Inventory Number */
>
> +#define X86_FEATURE_IBPB ( 7*32+16) /* Using Indirect Branch
> Prediction Barrier */
> #define X86_FEATURE_MBA ( 7*32+18) /* Memory Bandwidth
> Allocation */
> #define X86_FEATURE_RSB_CTXSW ( 7*32+19) /* Fill RSB on
> context switches */
>
> diff --git a/arch/x86/include/asm/nospec-branch.h
> b/arch/x86/include/asm/nospec-branch.h
> index 4ad4108..34e384c 100644
> --- a/arch/x86/include/asm/nospec-branch.h
> +++ b/arch/x86/include/asm/nospec-branch.h
> @@ -218,5 +218,18 @@ static inline void vmexit_fill_RSB(void)
> #endif
> }
>
> +static inline void indirect_branch_prediction_barrier(void)
> +{
> + asm volatile(ALTERNATIVE("",
> + "movl %[msr], %%ecx\n\t"
> + "movl %[val], %%eax\n\t"
> + "movl $0, %%edx\n\t"
> + "wrmsr",
> + X86_FEATURE_IBPB)
> + : : [msr] "i" (MSR_IA32_PRED_CMD),
> + [val] "i" (PRED_CMD_IBPB)
> + : "eax", "ecx", "edx", "memory");
Lemme paste my simplification suggestion from the other day:
"Btw, we can simplify this a bit by dropping the inputs and marking the 3
GPRs as clobbered:
alternative_input("",
"mov $0x49, %%ecx\n\t"
"mov $1, %%eax\n\t"
"xor %%edx, %%edx\n\t"
"wrmsr\n\t",
X86_FEATURE_IBPB,
ASM_NO_INPUT_CLOBBER("eax", "ecx", "edx", "memory"));
"
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
