On Fri, 2018-01-26 at 13:14 +0100, Yves-Alexis Perez wrote: > On Wed, 2018-01-24 at 16:57 +0000, David Woodhouse wrote: > > Some old Atoms, anything in family 5 or 4, and newer CPUs when they > > advertise > > the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO bit set, are not > > vulnerable. > > > > Roll the AMD exemption into the x86_match_cpu() table too. > > > > Based on suggestions from Dave Hansen and Alan Cox. > > Hi David, > > I know we'll still be able to manually enable PTI with a command line option, > but it's also a hardening feature which has the nice side effect of emulating > SMEP on CPU which don't support it (e.g the Atom boxes above). > > Couldn't we keep the “default on”? Or maybe on boxes which also have CPID (in > order to limit the performance cost)?
Strictly speaking, "don't enable PTI" is a side-effect of my patch, not directly what it does. All this patch does is *correctly* refrain from setting X86_BUG_CPU_MELTDOWN on CPUs which don't suffer that bug. It's the logic in arch/x86/mm/pti.c which enables PTI by default only for CPUs with the the bug. As for whether PCID reduces the performance hit sufficiently to make it worthwhile, "just" to emulate SMEP, I'm not sure. But I am sure it's someone else's problem for today except as a cosmetic comment on the headline of my patch :)
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