There are clock controller registers in the APCS block, which purpose is to control the main CPU mux and divider. Add the clock properties as part of the APCS device-tree node.
Signed-off-by: Georgi Djakov <[email protected]> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5414f53a0fa1..4539571a36b2 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -336,6 +336,8 @@ compatible = "qcom,msm8916-apcs-kpss-global", "syscon"; reg = <0xb011000 0x1000>; #mbox-cells = <1>; + clocks = <&a53pll>; + #clock-cells = <0>; }; blsp1_uart2: serial@78b0000 {
