On 02/14/2018 12:56 AM, Peter Zijlstra wrote:
>
> At the very least this must disable and re-enable preemption, such that
> we guarantee we inc/dec the same counter. ISTR some firmware calls (EFI)
> actually are preemptible so that wouldn't work.
>
> Further, consider:
>
> this_cpu_inc_return() // 0->1
> <NMI>
> this_cpu_inc_return() // 1->2
> call_broken_arse_firmware()
> this_cpu_dec_return() // 2->1
> </NMI>
> wrmsr(SPEC_CTRL, IBRS);
>
> /* from dodgy firmware crap */
>
> this_cpu_dec_return() // 1->0
> wrmsr(SPEC_CTRL, 0);
>
How about the following patch.
Thanks.
Tim
---
>From a37d28622781acf2789dd63f2fdb57be733f15a4 Mon Sep 17 00:00:00 2001
From: Tim Chen <tim.c.c...@linux.intel.com>
Date: Tue, 13 Feb 2018 04:10:41 -0800
Subject: [PATCH] x86/firmware: Prevent IBRS from being turned off prematurely.
Dave Woodhoue proposed using IBRS to protect the firmware
call path against Spectre exploit. However, firmware path
can go through NMI and we can get nested calls, causing
unsafe firmware calls with missing IBRS as illustrated below:
firmware_restrict_branch_speculation_start (set IBRS=1)
NMI
firmware_restrict_branch_speculation_start (set IBRS=1)
firmware call
firmware_restrict_branch_speculation_end (set IBRS=0)
NMI return
firmware call (with IBRS=0) <---- unsafe call, premature IBRS disabling
firmware_restrict_branch_speculation_end (set IBRS=0)
This patch proposes using a per cpu counter to track the IBRS
firmware call nesting depth, to ensure that we don't turn off
IBRS prematurely before calling firmware.
Signed-off-by: Tim Chen <tim.c.c...@linux.intel.com>
---
arch/x86/include/asm/nospec-branch.h | 10 ++++++++--
arch/x86/kernel/cpu/bugs.c | 2 ++
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/nospec-branch.h
b/arch/x86/include/asm/nospec-branch.h
index 297d457..a8dd9ea 100644
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -146,6 +146,8 @@ enum spectre_v2_mitigation {
extern char __indirect_thunk_start[];
extern char __indirect_thunk_end[];
+DECLARE_PER_CPU(int, spec_ctrl_ibrs_fw_depth);
+
/*
* On VMEXIT we must ensure that no RSB predictions learned in the guest
* can be followed in the host, by overwriting the RSB completely. Both
@@ -186,14 +188,18 @@ static inline void
indirect_branch_prediction_barrier(void)
*/
static inline void firmware_restrict_branch_speculation_start(void)
{
+ preempt_disable();
+ this_cpu_inc(spec_ctrl_ibrs_fw_depth);
alternative_msr_write(MSR_IA32_SPEC_CTRL, SPEC_CTRL_IBRS,
X86_FEATURE_USE_IBRS_FW);
}
static inline void firmware_restrict_branch_speculation_end(void)
{
- alternative_msr_write(MSR_IA32_SPEC_CTRL, 0,
- X86_FEATURE_USE_IBRS_FW);
+ if (this_cpu_dec_return(spec_ctrl_ibrs_fw_depth) == 0)
+ alternative_msr_write(MSR_IA32_SPEC_CTRL, 0,
+ X86_FEATURE_USE_IBRS_FW);
+ preempt_enable();
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_X86_NOSPEC_BRANCH_H_ */
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index c994dab..4ab13f0 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -27,6 +27,8 @@
#include <asm/intel-family.h>
static void __init spectre_v2_select_mitigation(void);
+DEFINE_PER_CPU(int, spec_ctrl_ibrs_fw_depth);
+EXPORT_PER_CPU_SYMBOL(spec_ctrl_ibrs_fw_depth);
void __init check_bugs(void)
{
--
2.7.4
