On 27/02/2018 03:22, Wanpeng Li wrote: >>> @@ -2551,7 +2561,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct >>> msr_data *msr_info) >>> msr_info->data = 0; >>> break; >>> case MSR_IA32_UCODE_REV: >>> - msr_info->data = 0x100000000ULL; >>> + msr_info->data = (u64)vcpu->arch.microcode_version; >> I think that the shifts are missing here (the version should be on the high >> bits according to intel_get_microcode_revision() ). > You are right, it seems that we all miss it before.
It's not that the shift are missing. It's that microcode_version should be u64 and initialized to 0x100000000ULL. Sorry I was too concise in my review of v2, and made that implicit. (Boris noticed offlist that AMD places the revision is in bit 0-31). Thanks, Paolo
