>From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh. Currently this driver registers as syscore ops and its resume function is called on every resume from S3. On Skylake and Kabylake, this causes a resume delay of around 100ms due to port IO operations, which is a problem.
This change allows to load the driver only when the platform bios explicitly supports such devices or has a cut-off date earlier than 2017. Please refer to chapter 21 of 6th Generation Intel® Core™ Processor Platform Controller Hub Family: BIOS Specification. https://www.intel.in/content/www/in/en/embedded/products/skylake/u-mobile/software-and-drivers.html Cc: Alan Cox <a...@linux.intel.com> Cc: Andy Shevchenko <andriy.shevche...@linux.intel.com> Signed-off-by: Anshuman Gupta <anshuman.gu...@intel.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhard...@intel.com> --- This depends on recently introduced dmi_get_bios_year() helper. https://patchwork.kernel.org/patch/10252151/ arch/x86/kernel/i8237.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/x86/kernel/i8237.c b/arch/x86/kernel/i8237.c index 8eeaa81de066..5c7a0dea7e19 100644 --- a/arch/x86/kernel/i8237.c +++ b/arch/x86/kernel/i8237.c @@ -9,6 +9,7 @@ * your option) any later version. */ +#include <linux/dmi.h> #include <linux/init.h> #include <linux/syscore_ops.h> @@ -49,6 +50,30 @@ static struct syscore_ops i8237_syscore_ops = { static int __init i8237A_init_ops(void) { + /* + * From SKL PCH onwards, the port 0x61 bit 4 would stop toggle and + * the legacy DMA device is removed in which the I/O ports (81h-83h, + * 87h, 89h-8Bh, 8Fh) related to it are removed as well. All + * removed ports must return 0xff for a inb() request. + * + * Note: DMA_PAGE_2 (port 0x81) should not be checked for detecting + * the presence of DMA device since it may be used by BIOS to decode + * LPC traffic for POST codes. Original LPC only decodes one byte of + * port 0x80 but some BIOS may choose to enhance PCH LPC port 0x8x + * decoding. + */ + if (inb(DMA_PAGE_0) == 0xFF) + return -ENODEV; + + /* + * It should be OK to not load this driver as newer SoC may not + * support 8237 DMA or bus mastering from LPC. Platform firmware + * must announce the support for such legacy devices via + * ACPI_FADT_LEGACY_DEVICES field in FADT table. + */ + if (!x86_platform.legacy.devices.pnpbios && dmi_get_bios_year() >= 2017) + return -ENODEV; + register_syscore_ops(&i8237_syscore_ops); return 0; } -- 2.7.4
