On 03/15/2018 03:18 AM, Borislav Petkov wrote: > On Thu, Mar 15, 2018 at 01:20:18AM +0000, York Sun wrote: >> The discussion led to using device tree to specify which cores have this >> feature. Since this feature is "implementation dependent", I can only >> confirm it is available on A53 core, and partially on A57 core (lacking >> error injection). It is not generic to ARM64 cores. > > So my ARM person is telling me A53 is little and A57 is big. > > In any case, I'd like to have a sane collection of RAS functionality, > either per uarch or per vendor. So I can imagine having edac_a53, > edac_a57, etc.
Wouldn't we have to duplicate codes if we create edac_a53, edac_a57, etc? > > But not per functional unit. Especially if the functionality is shared > between core designs. > > In that case, we'll have to do something like fsl_ddr_edac being shared > between MPC85xx and layerscape. > >> We can leave this patch floating. If someone else finds it useful, we >> can resume the discussion on how to generalize it. > > Yes. If you want to do a nxp_edac or so which supports your hardware, > that's fine. And then have the different functional units get built into > a final edac driver, that's fine with me too. Other drivers will reuse > those functional units since they're stock and should adhere to the > design... I may take this path after addressing other's comments. Thanks. York