On Mon, Jun 04, 2007 at 08:02:40PM +0200, Andi Kleen wrote:
> On Monday 04 June 2007 19:49, Joerg Roedel wrote:
> > From: Joerg Roedel <[EMAIL PROTECTED]>
> >
> > This patch removes the check for the CONSTANT_TSC cpu flag from time.c
> > on the x86_64 architecture. At the time this flag is checked at boot the
> > cpu init code was yet not executed and thus the check fails. At this
> > point the check for VENDOR_AMD and cpu family 0x10 is sufficient.
>
> Wrong fix. The bit just needs to be set earlier in early cpu detect.
> Otherwise
> there is a problem again with the next constant TSC AMD CPU.
> I will do that.
>
> -Andi
Ok. But I assume you are meaning something like the attached diff?
Signed-off-by: Joerg Roedel <[EMAIL PROTECTED]>
--
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diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index eb6524f..d16f7c2 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -806,6 +806,7 @@ void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
c->x86_model += ((tfms >> 16) & 0xF) << 4;
if (c->x86_capability[0] & (1<<19))
c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
+ c->extended_cpuid_level = cpuid_eax(0x80000000);
} else {
/* Have CPUID level 0 only - unheard of */
c->x86 = 4;
@@ -814,6 +815,12 @@ void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
#ifdef CONFIG_SMP
c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
#endif
+
+ /* power flags are 8000_0007 edx. Bit 8 is constant TSC */
+ if ((c->x86_vendor == X86_VENDOR_AMD) &&
+ (c->extended_cpuid_level >= 0x80000007) &&
+ (cpuid_edx(0x80000007) & (1<<8)))
+ set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
}
/*
