From: Paul Cercueil <[email protected]> [ Upstream commit e6cfa64375d34a6c8c1861868a381013b2d3b921 ]
Previously, the clocks with a fixed divider would report their rate as being the same as the one of their parent, independently of the divider in use. This commit fixes this behaviour. This went unnoticed as neither the jz4740 nor the jz4780 CGU code have clocks with fixed dividers yet. Signed-off-by: Paul Cercueil <[email protected]> Acked-by: Stephen Boyd <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Maarten ter Huurne <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/18477/ Signed-off-by: James Hogan <[email protected]> Signed-off-by: Sasha Levin <[email protected]> --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index ab393637f7b0..a2e73a6d60fd 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -328,6 +328,8 @@ ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) div *= clk_info->div.div; rate /= div; + } else if (clk_info->type & CGU_CLK_FIXDIV) { + rate /= clk_info->fixdiv.div; } return rate; -- 2.15.1
