Re: [PATCH] dec: tulip: de4x5: Replace mdelay with usleep_range in de4x5_hw_init

[kbuild test robot]

Hi Jia-Ju,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on net-next/master]
[also build test ERROR on v4.16 next-20180411]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:    
https://github.com/0day-ci/linux/commits/Jia-Ju-Bai/dec-tulip-de4x5-Replace-mdelay-with-usleep_range-in-de4x5_hw_init/20180411-222527
config: i386-randconfig-x015-201814 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/net//ethernet/dec/tulip/de4x5.c: In function 'de4x5_hw_init':
>> drivers/net//ethernet/dec/tulip/de4x5.c:1110:5: error: implicit declaration 
>> of function 'usleep'; did you mean 'ssleep'? 
>> [-Werror=implicit-function-declaration]
        usleep(10000, 11000);
        ^~~~~~
        ssleep
   cc1: some warnings being treated as errors

vim +1110 drivers/net//ethernet/dec/tulip/de4x5.c

  1091  
  1092  
  1093  static int
  1094  de4x5_hw_init(struct net_device *dev, u_long iobase, struct device 
*gendev)
  1095  {
  1096      char name[DE4X5_NAME_LENGTH + 1];
  1097      struct de4x5_private *lp = netdev_priv(dev);
  1098      struct pci_dev *pdev = NULL;
  1099      int i, status=0;
  1100  
  1101      dev_set_drvdata(gendev, dev);
  1102  
  1103      /* Ensure we're not sleeping */
  1104      if (lp->bus == EISA) {
  1105          outb(WAKEUP, PCI_CFPM);
  1106      } else {
  1107          pdev = to_pci_dev (gendev);
  1108          pci_write_config_byte(pdev, PCI_CFDA_PSM, WAKEUP);
  1109      }
> 1110      usleep(10000, 11000);
  1111  
  1112      RESET_DE4X5;
  1113  
  1114      if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) {
  1115          return -ENXIO;                       /* Hardware could not 
reset */
  1116      }
  1117  
  1118      /*
  1119      ** Now find out what kind of DC21040/DC21041/DC21140 board we have.
  1120      */
  1121      lp->useSROM = false;
  1122      if (lp->bus == PCI) {
  1123          PCI_signature(name, lp);
  1124      } else {
  1125          EISA_signature(name, gendev);
  1126      }
  1127  
  1128      if (*name == '\0') {                     /* Not found a board 
signature */
  1129          return -ENXIO;
  1130      }
  1131  
  1132      dev->base_addr = iobase;
  1133      printk ("%s: %s at 0x%04lx", dev_name(gendev), name, iobase);
  1134  
  1135      status = get_hw_addr(dev);
  1136      printk(", h/w address %pM\n", dev->dev_addr);
  1137  
  1138      if (status != 0) {
  1139          printk("      which has an Ethernet PROM CRC error.\n");
  1140          return -ENXIO;
  1141      } else {
  1142          skb_queue_head_init(&lp->cache.queue);
  1143          lp->cache.gepc = GEP_INIT;
  1144          lp->asBit = GEP_SLNK;
  1145          lp->asPolarity = GEP_SLNK;
  1146          lp->asBitValid = ~0;
  1147          lp->timeout = -1;
  1148          lp->gendev = gendev;
  1149          spin_lock_init(&lp->lock);
  1150          timer_setup(&lp->timer, de4x5_ast, 0);
  1151          de4x5_parse_params(dev);
  1152  
  1153          /*
  1154          ** Choose correct autosensing in case someone messed up
  1155          */
  1156          lp->autosense = lp->params.autosense;
  1157          if (lp->chipset != DC21140) {
  1158              if ((lp->chipset==DC21040) && (lp->params.autosense&TP_NW)) 
{
  1159                  lp->params.autosense = TP;
  1160              }
  1161              if ((lp->chipset==DC21041) && 
(lp->params.autosense&BNC_AUI)) {
  1162                  lp->params.autosense = BNC;
  1163              }
  1164          }
  1165          lp->fdx = lp->params.fdx;
  1166          sprintf(lp->adapter_name,"%s (%s)", name, dev_name(gendev));
  1167  
  1168          lp->dma_size = (NUM_RX_DESC + NUM_TX_DESC) * sizeof(struct 
de4x5_desc);
  1169  #if defined(__alpha__) || defined(__powerpc__) || defined(CONFIG_SPARC) 
|| defined(DE4X5_DO_MEMCPY)
  1170          lp->dma_size += RX_BUFF_SZ * NUM_RX_DESC + DE4X5_ALIGN;
  1171  #endif
  1172          lp->rx_ring = dma_alloc_coherent(gendev, lp->dma_size,
  1173                                           &lp->dma_rings, GFP_ATOMIC);
  1174          if (lp->rx_ring == NULL) {
  1175              return -ENOMEM;
  1176          }
  1177  
  1178          lp->tx_ring = lp->rx_ring + NUM_RX_DESC;
  1179  
  1180          /*
  1181          ** Set up the RX descriptor ring (Intels)
  1182          ** Allocate contiguous receive buffers, long word aligned 
(Alphas)
  1183          */
  1184  #if !defined(__alpha__) && !defined(__powerpc__) && 
!defined(CONFIG_SPARC) && !defined(DE4X5_DO_MEMCPY)
  1185          for (i=0; i<NUM_RX_DESC; i++) {
  1186              lp->rx_ring[i].status = 0;
  1187              lp->rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ);
  1188              lp->rx_ring[i].buf = 0;
  1189              lp->rx_ring[i].next = 0;
  1190              lp->rx_skb[i] = (struct sk_buff *) 1;     /* Dummy entry */
  1191          }
  1192  

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