[PATCH 4.9 54/95] clk: bcm2835: De-assert/assert PLL reset signal when appropriate

[Greg Kroah-Hartman]

4.9-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Boris Brezillon <boris.brezil...@bootlin.com>

commit 753872373b599384ac7df809aa61ea12d1c4d5d1 upstream.

In order to enable a PLL, not only the PLL has to be powered up and
locked, but you also have to de-assert the reset signal. The last part
was missing. Add it so PLLs that were not enabled by the FW/bootloader
can be enabled from Linux.

Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio 
domain clocks")
Cc: <sta...@vger.kernel.org>
Signed-off-by: Boris Brezillon <boris.brezil...@bootlin.com>
Reviewed-by: Eric Anholt <e...@anholt.net>
Signed-off-by: Stephen Boyd <sb...@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>

---
 drivers/clk/bcm/clk-bcm2835.c |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -545,9 +545,7 @@ static void bcm2835_pll_off(struct clk_h
        const struct bcm2835_pll_data *data = pll->data;
 
        spin_lock(&cprman->regs_lock);
-       cprman_write(cprman, data->cm_ctrl_reg,
-                    cprman_read(cprman, data->cm_ctrl_reg) |
-                    CM_PLL_ANARST);
+       cprman_write(cprman, data->cm_ctrl_reg, CM_PLL_ANARST);
        cprman_write(cprman, data->a2w_ctrl_reg,
                     cprman_read(cprman, data->a2w_ctrl_reg) |
                     A2W_PLL_CTRL_PWRDN);
@@ -583,6 +581,10 @@ static int bcm2835_pll_on(struct clk_hw
                cpu_relax();
        }
 
+       cprman_write(cprman, data->a2w_ctrl_reg,
+                    cprman_read(cprman, data->a2w_ctrl_reg) |
+                    A2W_PLL_CTRL_PRST_DISABLE);
+
        return 0;
 }