Clean up the silly cpu_detect_cache_sizes() calling by including the
cpu_detect_cache_sizes() inside the init_intel_cacheinfo(). 

Signed-off-by: David Wang <davidw...@zhaoxin.com>
---
 arch/x86/kernel/cpu/intel.c           | 8 +-------
 arch/x86/kernel/cpu/intel_cacheinfo.c | 6 ++++++
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index f683f7d..56e3259 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -659,13 +659,7 @@ static void init_intel(struct cpuinfo_x86 *c)
 #endif
        }
 
-       l2 = init_intel_cacheinfo(c);
-
-       /* Detect legacy cache sizes if init_intel_cacheinfo did not */
-       if (l2 == 0) {
-               cpu_detect_cache_sizes(c);
-               l2 = c->x86_cache_size;
-       }
+       init_intel_cacheinfo(c);
 
        if (c->cpuid_level > 9) {
                unsigned eax = cpuid_eax(10);
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c 
b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 54d04d5..2a0597c 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -20,6 +20,8 @@
 #include <asm/amd_nb.h>
 #include <asm/smp.h>
 
+#include "cpu.h"
+
 #define LVL_1_INST     1
 #define LVL_1_DATA     2
 #define LVL_2          3
@@ -802,6 +804,10 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
 
        c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
 
+       if (!l2) {
+               cpu_detect_cache_sizes(c);
+               l2 = c->x86_cache_size;
+       }
        return l2;
 }
 
-- 
1.9.1

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