On Thu, May 03, 2018 at 08:08:43PM +0800, Luwei Kang wrote:
> Currently, Intel Processor Trace do not support tracing in L1 guest
> VMX operation(IA32_VMX_MISC[bit 14] is 0). As mentioned in SDM,
I don't understand this patch. You mention VMX_MISC[14] here, but I
can't see anything related to it in the code.
Also, the description should probably say "...does not support tracing
in VMX *if* IA32_VMX_MISC[bit 14] is 0."
> on these type of processors, execution of the VMXON instruction will
> clears IA32_RTIT_CTL.TraceEn and any attempt to write IA32_RTIT_CTL
> causes a general-protection exception (#GP).
>
> Signed-off-by: Luwei Kang <luwei.k...@intel.com>
> ---
> arch/x86/kvm/vmx.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index c125fb1..1e800d0 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -3952,7 +3952,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct
> msr_data *msr_info)
> break;
> case MSR_IA32_RTIT_CTL:
> if ((pt_mode != PT_MODE_HOST_GUEST) ||
> - vmx_rtit_ctl_check(vcpu, data))
> + vmx_rtit_ctl_check(vcpu, data) ||
> + vmx->nested.vmxon)
> return 1;
> vmcs_write64(GUEST_IA32_RTIT_CTL, data);
> pt_set_intercept_for_msr(vmx, !(data & RTIT_CTL_TRACEEN));
> @@ -8029,6 +8030,12 @@ static int handle_vmon(struct kvm_vcpu *vcpu)
> if (ret)
> return ret;
>
> + if (pt_mode == PT_MODE_HOST_GUEST) {
> + vmx->pt_desc.guest.ctl = 0;
> + vmcs_write64(GUEST_IA32_RTIT_CTL, 0);
> + pt_set_intercept_for_msr(vmx, 1);
> + }
> +
> nested_vmx_succeed(vcpu);
> return kvm_skip_emulated_instruction(vcpu);
> }
> --
> 1.8.3.1
>
