In ATF we already wait for DDR DVFS finish, so move the interrupts properties to be optional.
Signed-off-by: Enric Balletbo i Serra <[email protected]> Reviewed-by: Chanwoo Choi <[email protected]> Reviewed-by: Rob Herring <[email protected]> --- Changes in v4: - [4/6] Add Reviewed-by Rob Herring. Changes in v3: - [4/6] Move interrupts to be optional instead of remove. Changes in v2: - [4/6] Add Reviewed-by Chanwoo Choi. .../devicetree/bindings/devfreq/rk3399_dmc.txt | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt index e0030a139383..0ec68141f85a 100644 --- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt @@ -5,10 +5,6 @@ Required properties: - devfreq-events: Node to get DDR loading, Refer to Documentation/devicetree/bindings/devfreq/event/ rockchip-dfi.txt -- interrupts: The CPU interrupt number. The interrupt specifier - format depends on the interrupt controller. - It should be a DCF interrupt. When DDR DVFS finishes - a DCF interrupt is triggered. - clocks: Phandles for clock specified in "clock-names" property - clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon"; @@ -17,6 +13,12 @@ Required properties: - center-supply: DMC supply node. - status: Marks the node enabled/disabled. +Optional properties: +- interrupts: The CPU interrupt number. The interrupt specifier + format depends on the interrupt controller. + It should be a DCF interrupt. When DDR DVFS finishes + a DCF interrupt is triggered. + Following properties relate to DDR timing: - rockchip,dram_speed_bin : Value reference include/dt-bindings/clock/rk3399-ddr.h, -- 2.17.0
