4.16-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Tero Kristo <[email protected]>

commit 269bd202bc0fd04e841cb123867fd3f49e04ace9 upstream.

The introduction of support for CLK_SET_RATE_PARENT flag for clkctrl
clocks used a generic clock flag, which causes a conflict with the
rest of the clkctrl flags, namely the NO_IDLEST flag. This can cause
boot failures on certain platforms where this flag is introduced, by
omitting the wait for the clockctrl module to be fully enabled before
proceeding with rest of the code.

Fix this by moving all the clkctrl specific flags to their own bit-range.

Signed-off-by: Tero Kristo <[email protected]>
Fixes: 49159a9dc3da ("clk: ti: add support for CLK_SET_RATE_PARENT flag")
Reported-by: Christophe Lyon <[email protected]>
Tested-by: Tony Lindgren <[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Cc: Sam Protsenko <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

---
 drivers/clk/ti/clock.h |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -74,6 +74,11 @@ enum {
 #define CLKF_CORE                      (1 << 9)
 #define CLKF_J_TYPE                    (1 << 10)
 
+/* CLKCTRL flags */
+#define CLKF_SW_SUP                    BIT(5)
+#define CLKF_HW_SUP                    BIT(6)
+#define CLKF_NO_IDLEST                 BIT(7)
+
 #define CLK(dev, con, ck)              \
        {                               \
                .lk = {                 \
@@ -183,10 +188,6 @@ extern const struct omap_clkctrl_data am
 extern const struct omap_clkctrl_data dm814_clkctrl_data[];
 extern const struct omap_clkctrl_data dm816_clkctrl_data[];
 
-#define CLKF_SW_SUP    BIT(0)
-#define CLKF_HW_SUP    BIT(1)
-#define CLKF_NO_IDLEST BIT(2)
-
 typedef void (*ti_of_clk_init_cb_t)(void *, struct device_node *);
 
 struct clk *ti_clk_register(struct device *dev, struct clk_hw *hw,


Reply via email to