On Tue, May 08, 2018 at 07:26:04PM +0300, Dmitry Osipenko wrote: > Muxing of pins MCLK1/2 determine the muxing of the corresponding clocks. > Make pinctrl driver to provide clock muxes for the CDEV1/2 pingroups, so > that main clk-controller driver could get an actual parent clock for the > CDEV1/2 clocks. > > Signed-off-by: Dmitry Osipenko <[email protected]> > Reviewed-by: Marcel Ziswiler <[email protected]> > Tested-by: Marcel Ziswiler <[email protected]> > Tested-by: Marc Dietrich <[email protected]> > Acked-by: Peter De Schrijver <[email protected]> > --- > > Changelog: > > v3: > - No change. > > v2: > - See changelog of "Restore ULPI USB on Tegra20" v2 series. > > drivers/pinctrl/tegra/pinctrl-tegra.c | 11 --------- > drivers/pinctrl/tegra/pinctrl-tegra.h | 11 +++++++++ > drivers/pinctrl/tegra/pinctrl-tegra20.c | 30 ++++++++++++++++++++++++- > 3 files changed, 40 insertions(+), 12 deletions(-)
Linus, were you going to pick this up for v4.18? There's a runtime dependency on this from some clock patches that I'd like to get into v4.18. I see I never gave my Acked-by on this particular patch, so here goes: Acked-by: Thierry Reding <[email protected]>
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