On Fri, May 25, 2018 at 11:27:46AM +0200, Geert Uytterhoeven wrote:
> Hi Michel,
>
> On Thu, May 24, 2018 at 11:28 AM, Michel Pollet
> <michel.pol...@bp.renesas.com> wrote:
> > This adds the Renesas R9A06G032 bare bone support.
> >
> > This currently only handles generic parts (gic, architected timer)
> > and a UART.
> >
> > Signed-off-by: Michel Pollet <michel.pol...@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/r9a06g032.dtsi
>
> > + soc {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + interrupt-parent = <&gic>;
> > + ranges;
> > +
> > + sysctrl: sysctrl@4000c000 {
>
> system-controller@
>
> > + compatible = "renesas,r9a06g032-sysctrl";
> > + reg = <0x4000c000 0x1000>;
> > + status = "okay";
> > + #clock-cells = <1>;
> > + };
>
> With the minor nit above resolved, and pending acceptance of the
> sysctrl bindings:
>
> Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Thanks. I have marked this patch, and the following one, as deferred
pending acceptance of those bindings. Please repost or otherwise ping me
once that has happened.
