On Wed, May 30, 2018 at 1:24 AM, Eddie James <[email protected]> wrote:
> From: "Edward A. James" <[email protected]>
>
> Add abort procedure for failed transfers. Add engine and bus reset
> procedures to recover from as many faults as possible.
> +#define I2C_PORT_BUSY_RESET 0x80000000
BIT() ?
> + for (i = 0; i < 9; ++i) {
i++ would work as well.
> + rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_RESET_SCL, &dummy);
> + if (rc)
> + return rc;
> +
> + rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_SET_SCL, &dummy);
> + if (rc)
> + return rc;
> + }
> + /* reset errors */
> + dummy = 0;
> + rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_RESET_ERR, &dummy);
> + if (rc)
> + return rc;
Ah, okay, discard my previous comments on dummy assignments. It seems
input and output.
> + msleep(1);
msleep(1) usually a bad idea.
usleep_range() I guess what you need here.
> +}
> + return -ETIME;
ETIMEDOUT ?
--
With Best Regards,
Andy Shevchenko
