Quoting Mike Looijmans (2018-05-31 07:03:55) > The si544 driver had a rounding problem that using the result of > clk_round_rate > may set the clock to yet another rate, for example: > clk_round_rate(195000000) = 194999999 > clk_round_rate(194999999) = 194999998 > > Clients would expect that after clk_set_rate(clk, freq2=clk_round_rate(clk, > freq)) the > chip will be running at exactly freq2. > > The problem was in the calculation of the feedback divider, it was always > rounded > down instead of to the nearest possible VCO value. > > After this change, the following holds true for any supported frequency: > actual_freq = clk_round_rate(clk, freq); > clk_set_rate(clk, actual_freq); > clk_round_rate(clk, actual_freq) == actual_freq && clk_get_rate(clk) == > actual_freq > > Signed-off-by: Mike Looijmans <mike.looijm...@topic.nl> > ---
Applied to clk-next
