On Wed, Jun 06, 2018 at 12:31:20PM +0530, Chintan Pandya wrote: > Add an interface to invalidate intermediate page tables > from TLB for kernel. > > Signed-off-by: Chintan Pandya <cpan...@codeaurora.org> > --- > arch/arm64/include/asm/tlbflush.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/include/asm/tlbflush.h > b/arch/arm64/include/asm/tlbflush.h > index dfc61d7..a4a1901 100644 > --- a/arch/arm64/include/asm/tlbflush.h > +++ b/arch/arm64/include/asm/tlbflush.h > @@ -218,6 +218,13 @@ static inline void __flush_tlb_pgtable(struct mm_struct > *mm, > dsb(ish); > } > > +static inline void __flush_tlb_kernel_pgtable(unsigned long kaddr) > +{ > + unsigned long addr = __TLBI_VADDR(kaddr, 0); > + > + __tlbi(vaae1is, addr); > + dsb(ish); > +} > #endif
Acked-by: Will Deacon <will.dea...@arm.com> Will