On Mon, May 28, 2018 at 07:34:09PM +0200, Clément Péron wrote:
> From: Colin Didier <colin.did...@devialet.com>
> 
> Add EPIT clock support to the i.MX6Q clocking infrastructure.
> 
> Signed-off-by: Colin Didier <colin.did...@devialet.com>
> Signed-off-by: Clément Peron <clement.pe...@devialet.com>

This is a clock patch and should be prefixed with 'clk: imx6q: ...'
rather than 'ARM: ...'  Otherwise,

Acked-by: Shawn Guo <shawn...@kernel.org>

> ---
>  drivers/clk/imx/clk-imx6q.c               | 2 ++
>  include/dt-bindings/clock/imx6qdl-clock.h | 4 +++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
> index 8d518ad5dc13..b9ea7037e193 100644
> --- a/drivers/clk/imx/clk-imx6q.c
> +++ b/drivers/clk/imx/clk-imx6q.c
> @@ -753,6 +753,8 @@ static void __init imx6q_clocks_init(struct device_node 
> *ccm_node)
>       else
>               clk[IMX6Q_CLK_ECSPI5] = imx_clk_gate2("ecspi5",        
> "ecspi_root",        base + 0x6c, 8);
>       clk[IMX6QDL_CLK_ENET]         = imx_clk_gate2("enet",          "ipg",   
>             base + 0x6c, 10);
> +     clk[IMX6QDL_CLK_EPIT1]        = imx_clk_gate2("epit1",         "ipg",   
>             base + 0x6c, 12);
> +     clk[IMX6QDL_CLK_EPIT2]        = imx_clk_gate2("epit2",         "ipg",   
>             base + 0x6c, 14);
>       clk[IMX6QDL_CLK_ESAI_EXTAL]   = imx_clk_gate2_shared("esai_extal",   
> "esai_podf",   base + 0x6c, 16, &share_count_esai);
>       clk[IMX6QDL_CLK_ESAI_IPG]     = imx_clk_gate2_shared("esai_ipg",   
> "ahb",           base + 0x6c, 16, &share_count_esai);
>       clk[IMX6QDL_CLK_ESAI_MEM]     = imx_clk_gate2_shared("esai_mem", "ahb", 
>             base + 0x6c, 16, &share_count_esai);
> diff --git a/include/dt-bindings/clock/imx6qdl-clock.h 
> b/include/dt-bindings/clock/imx6qdl-clock.h
> index da59fd9cdb5e..7ad171b8f3bf 100644
> --- a/include/dt-bindings/clock/imx6qdl-clock.h
> +++ b/include/dt-bindings/clock/imx6qdl-clock.h
> @@ -271,6 +271,8 @@
>  #define IMX6QDL_CLK_PRE_AXI                  258
>  #define IMX6QDL_CLK_MLB_SEL                  259
>  #define IMX6QDL_CLK_MLB_PODF                 260
> -#define IMX6QDL_CLK_END                              261
> +#define IMX6QDL_CLK_EPIT1                    261
> +#define IMX6QDL_CLK_EPIT2                    262
> +#define IMX6QDL_CLK_END                              263
>  
>  #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
> -- 
> 2.17.0
> 

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