Commit-ID: a9347363748fbfc25d0ba7b60d866b8a10ca4561
Gitweb: https://git.kernel.org/tip/a9347363748fbfc25d0ba7b60d866b8a10ca4561
Author: Reinette Chatre <reinette.cha...@intel.com>
AuthorDate: Tue, 19 Jun 2018 23:19:27 -0700
Committer: Thomas Gleixner <t...@linutronix.de>
CommitDate: Wed, 20 Jun 2018 10:26:52 +0200
x86/intel_rdt: Fix passing of value to 32-bit register
0-day kbuild test robot reported the following issue:
arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c: In function 'pseudo_lock_fn':
>> arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c:363:1: warning: unsupported size
>> for integer register
}
^
>> arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c:363:1: warning: unsupported size
>> for integer register
vim +363 arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
361 wake_up_interruptible(&plr->lock_thread_wq);
362 return 0;
> 363 }
364
The issue is earlier in the code, and in more locations, where (in 32-bit)
a u64 variable (i below) is used as the value of a 32-bit register:
asm volatile("mov (%0,%1,1), %%eax\n\t"
:
: "r" (mem_r), "r" (i)
: "%eax", "memory");
The behavior in this case would be that only the 32 bit lower part of the
variable is passed. The variable is used as a counter in a for loop that
iterates over the pseudo-locked region and its maximum value is thus the
largest size of a pseudo-locked region. No pseudo-locked region currently
supported would need more than 32-bits for its size. There is thus no
potential for harm in the current state when using the u64 variable, but
this should be fixed.
Modify the variable with which the registers are initialized to be 64-bit
when used for 64-bit register and 32-bit when used for 32-bit register.
Fixes: 0438fb1aebf4 ("x86/intel_rdt: Pseudo-lock region creation/removal core")
Reported-by: l...@intel.com
Signed-off-by: Reinette Chatre <reinette.cha...@intel.com>
Signed-off-by: Thomas Gleixner <t...@linutronix.de>
Cc: kbuild-...@01.org
Cc: tipbu...@zytor.com
Cc: fenghua...@intel.com
Cc: tony.l...@intel.com
Cc: h...@zytor.com
Link:
https://lkml.kernel.org/r/5773274f9947c4d8becbabd2655bd1628f060147.1529474468.git.reinette.cha...@intel.com
---
arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
index 0d44dc1f7146..a1670e50d6ce 100644
--- a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
+++ b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c
@@ -415,7 +415,11 @@ static int pseudo_lock_fn(void *_rdtgrp)
struct rdtgroup *rdtgrp = _rdtgrp;
struct pseudo_lock_region *plr = rdtgrp->plr;
u32 rmid_p, closid_p;
+#ifdef CONFIG_X86_64
u64 i;
+#else
+ u32 i;
+#endif
#ifdef CONFIG_KASAN
/*
* The registers used for local register variables are also used
@@ -870,7 +874,11 @@ static int measure_cycles_lat_fn(void *_plr)
{
struct pseudo_lock_region *plr = _plr;
u64 start, end;
+#ifdef CONFIG_X86_64
u64 i;
+#else
+ u32 i;
+#endif
#ifdef CONFIG_KASAN
/*
* The registers used for local register variables are also used
@@ -924,7 +932,11 @@ static int measure_cycles_perf_fn(void *_plr)
struct pseudo_lock_region *plr = _plr;
unsigned long long l2_hits, l2_miss;
u64 l2_hit_bits, l2_miss_bits;
+#ifdef CONFIG_X86_64
u64 i;
+#else
+ u32 i;
+#endif
#ifdef CONFIG_KASAN
/*
* The registers used for local register variables are also used
