On 15/06/18 05:04, Chunyan Zhang wrote:
> According to the SD host controller specification version 4.10, when
> Host Version 4 is enabled, SDMA uses ADMA System Address register
> (05Fh-058h) instead of using SDMA System Address register to
> support both 32-bit and 64-bit addressing.
> 
> Signed-off-by: Chunyan Zhang <zhang.chun...@linaro.org>
> ---
>  drivers/mmc/host/sdhci.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index cf5695f..f57201f 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -805,6 +805,7 @@ static void sdhci_set_timeout(struct sdhci_host *host, 
> struct mmc_command *cmd)
>  static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command 
> *cmd)
>  {
>       u8 ctrl;
> +     u32 reg;

reg could just be an int.

>       struct mmc_data *data = cmd->data;
>  
>       if (sdhci_data_line_cmd(cmd))
> @@ -894,8 +895,10 @@ static void sdhci_prepare_data(struct sdhci_host *host, 
> struct mmc_command *cmd)
>                                            SDHCI_ADMA_ADDRESS_HI);
>               } else {
>                       WARN_ON(sg_cnt != 1);
> +                     reg = host->v4_mode ? SDHCI_ADMA_ADDRESS :
> +                             SDHCI_DMA_ADDRESS;
>                       sdhci_writel(host, sdhci_sdma_address(host),
> -                                  SDHCI_DMA_ADDRESS);
> +                                  reg);

Shouldn't we support 64-bit SDMA in version 4 mode?


>               }
>       }
>  
> @@ -2721,6 +2724,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 
> intmask)
>                */
>               if (intmask & SDHCI_INT_DMA_END) {
>                       u32 dmastart, dmanow;
> +                     u32 reg;
>  
>                       dmastart = sdhci_sdma_address(host);
>                       dmanow = dmastart + host->data->bytes_xfered;
> @@ -2733,7 +2737,9 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 
> intmask)
>                       host->data->bytes_xfered = dmanow - dmastart;
>                       DBG("DMA base 0x%08x, transferred 0x%06x bytes, next 
> 0x%08x\n",
>                           dmastart, host->data->bytes_xfered, dmanow);
> -                     sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS);
> +                     reg = host->v4_mode ? SDHCI_ADMA_ADDRESS :
> +                             SDHCI_DMA_ADDRESS;
> +                     sdhci_writel(host, dmanow, reg);

Shouldn't we support 64-bit SDMA in version 4 mode?

>               }
>  
>               if (intmask & SDHCI_INT_DATA_END) {
> 

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