On Fri, 2018-06-22 at 07:58 -0700, Andy Lutomirski wrote: > On Wed, Jun 20, 2018 at 12:57 PM Rik van Riel <[email protected]> > wrote: > > > > +++ b/arch/x86/mm/tlb.c > > @@ -646,6 +646,30 @@ void flush_tlb_mm_range(struct mm_struct *mm, > > unsigned long start, > > put_cpu(); > > } > > > > +void tlb_flush_remove_tables_local(void *arg) > > +{ > > + struct mm_struct *mm = arg; > > + > > + if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm && > > + this_cpu_read(cpu_tlbstate.is_lazy)) > > + /* > > + * We're in lazy mode. We need to at least flush > > our > > + * paging-structure cache to avoid speculatively > > reading > > + * garbage into our TLB. Since switching to > > init_mm is barely > > + * slower than a minimal flush, just switch to > > init_mm. > > + */ > > + switch_mm_irqs_off(NULL, &init_mm, NULL); > > Can you add braces?
Will do.
> > +}
> > +
> > +void tlb_flush_remove_tables(struct mm_struct *mm)
> > +{
> > + int cpu = get_cpu();
> > + /*
> > + * XXX: this really only needs to be called for CPUs in
> > lazy TLB mode.
> > + */
> > + if (cpumask_any_but(mm_cpumask(mm), cpu) < nr_cpu_ids)
> > + smp_call_function_many(mm_cpumask(mm),
> > tlb_flush_remove_tables_local, (void *)mm, 1);
>
> I suspect that most if the gain will come from fixing this limitation
> :)
Patch 5 does that.
However, I suspect most of the gain comes from
not having mprotect and madvise send IPIs to
lazy TLB mode CPUs at all any more :)
--
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