> Anyway, back to the problem of being able to use the memory model to
> describe locks. This is I think a useful property.
>
> My earlier reasoning was that:
>
> - smp_store_release() + smp_load_acquire() := RCpc
>
> - we use smp_store_release() as unlock()
>
> Therefore, if we want unlock+lock to imply at least TSO (ideally
> smp_mb()) we need lock to make up for whatever unlock lacks.
>
> Hence my proposal to strenghten rmw-acquire, because that is the basic
> primitive used to implement lock.
>
> But as you (and Will) point out, we don't so much care about rmw-acquire
> semantics as much as that we care about unlock+lock behaviour. Another
> way to look at this is to define:
>
> smp-store-release + rmw-acquire := TSO (ideally smp_mb)
>
> But then we also have to look at:
>
> rmw-release + smp-load-acquire
> rmw-release + rmw-acquire
>
> for completeness sake, and I would suggest they result in (at least) the
> same (TSO) ordering as the one we really care about.
Indeed (unless I'm not seeing something... ;-).
>
> One alternative is to no longer use smp_store_release() for unlock(),
> and say define atomic_set_release() to be in the rmw-release class
> instead of being a simple smp_store_release().
>
> Another, and I like this proposal least, is to introduce a new barrier
> to make this all work.
An smp_tso__after_unlock_lock()? (In a certain sense, the solution
adopted by RCU aligns to this approach: live with powerpc's RCpc and
introduce smp_mb__after_unlock_lock().) Or did you have something
else in mind?
But I wouldn't hasten to introduce such a barrier, given that: (1)
this would be a "do { } while (0)" for all the supported arch. _if_
we sticked to the current implementations, and (2) even if these
implementations changed or some new arch. required a non-trivial
definition, we still would have to find a "pure/TSO" case ;-).
Andrea
