On Wed, 2018-07-18 at 21:48 +0200, Krzysztof Kozlowski wrote:
> Fix indentation and alignment when spaces were used instead of tabs.
> This fixes checkpatch errors like:
> 
>     ERROR: code indent should use tabs where possible
>     #306: FILE: arch/arm/boot/dts/tegra20-paz00.dts:306:
>     +^I^I         <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;$
> 
> Signed-off-by: Krzysztof Kozlowski <k...@kernel.org>

Acked-by: Marcel Ziswiler <marcel.ziswi...@toradex.com>

> ---
>  arch/arm/boot/dts/tegra20-colibri.dtsi | 2 +-
>  arch/arm/boot/dts/tegra20-paz00.dts    | 6 +++---
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi
> b/arch/arm/boot/dts/tegra20-colibri.dtsi
> index e7b9ab09908a..fa1af2dc276c 100644
> --- a/arch/arm/boot/dts/tegra20-colibri.dtsi
> +++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
> @@ -541,7 +541,7 @@
>  
>       sound {
>               compatible = "nvidia,tegra-audio-wm9712-
> colibri_t20",
> -                              "nvidia,tegra-audio-wm9712";
> +                          "nvidia,tegra-audio-wm9712";
>               nvidia,model = "Colibri T20 AC97 Audio";
>  
>               nvidia,audio-routing =
> diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
> b/arch/arm/boot/dts/tegra20-paz00.dts
> index ef245291924f..7d8aef6ebd3a 100644
> --- a/arch/arm/boot/dts/tegra20-paz00.dts
> +++ b/arch/arm/boot/dts/tegra20-paz00.dts
> @@ -303,7 +303,7 @@
>               request-gpios = <&gpio TEGRA_GPIO(V, 2)
> GPIO_ACTIVE_HIGH>;
>               slave-addr = <138>;
>               clocks = <&tegra_car TEGRA20_CLK_I2C3>,
> -                      <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
> +                      <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
>               clock-names = "div-clk", "fast-clk";
>               resets = <&tegra_car 67>;
>               reset-names = "i2c";
> @@ -599,8 +599,8 @@
>                       GPIO_ACTIVE_HIGH>;
>  
>               clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
> -                      <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
> -                      <&tegra_car TEGRA20_CLK_CDEV1>;
> +                      <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
> +                      <&tegra_car TEGRA20_CLK_CDEV1>;
>               clock-names = "pll_a", "pll_a_out0", "mclk";
>       };
>  };

BTW: I am anyway in the process of sending out a major revamp of all our device 
trees targeting the Tegras and likewise made sure they do pass checkpatch (;-p).

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