Hi,
On 21-Jul-18 7:51 PM, Nicholas Mc Guire wrote:
> wait_for_completion_timeout returns unsigned long not int so a variable of
> proper type is introduced. Further the check for <= 0 is ambiguous and should
> be == 0 here.
>
Oops, my bad. Thanks for the fix! I see you have fixed similar bug in
cqspi_indirect_read_execute(). There is similar code in
cqspi_indirect_write_execute(). Could you fix that as well?
Regards
Vignesh
> Signed-off-by: Nicholas Mc Guire <hof...@osadl.org>
> Fixes: ffa639e069fb ("mtd: spi-nor: cadence-quadspi: Add DMA support for
> direct mode reads")
> ---
>
> Patch found by experimental coccinelle API conformance checker
>> Patch was compile tested with: socfpga_defconfig (implies
> CONFIG_SPI_CADENCE_QUADSPI=y)
>
> Patch is against 4.18-rc5 (localversion-next is next-20180720)
>
> drivers/mtd/spi-nor/cadence-quadspi.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c
> b/drivers/mtd/spi-nor/cadence-quadspi.c
> index d7e10b3..79f6a54 100644
> --- a/drivers/mtd/spi-nor/cadence-quadspi.c
> +++ b/drivers/mtd/spi-nor/cadence-quadspi.c
> @@ -953,6 +953,7 @@ static int cqspi_direct_read_execute(struct spi_nor *nor,
> u_char *buf,
> enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
> dma_addr_t dma_src = (dma_addr_t)cqspi->mmap_phys_base + from;
> int ret = 0;
> + unsigned long timeout;
> struct dma_async_tx_descriptor *tx;
> dma_cookie_t cookie;
> dma_addr_t dma_dst;
> @@ -988,9 +989,9 @@ static int cqspi_direct_read_execute(struct spi_nor *nor,
> u_char *buf,
> }
>
> dma_async_issue_pending(cqspi->rx_chan);
> - ret = wait_for_completion_timeout(&cqspi->rx_dma_complete,
> - msecs_to_jiffies(len));
> - if (ret <= 0) {
> + timeout = wait_for_completion_timeout(&cqspi->rx_dma_complete,
> + msecs_to_jiffies(len));
> + if (timeout == 0) {
> dmaengine_terminate_sync(cqspi->rx_chan);
> dev_err(nor->dev, "DMA wait_for_completion_timeout\n");
> ret = -ETIMEDOUT;
>
