Add the audio memory arbiter which control the access of the audio
fifos to the DDR.

Signed-off-by: Jerome Brunet <[email protected]>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 6adc8d3dbf0a..3893c630d969 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -189,6 +189,13 @@
 
                                resets = <&reset RESET_AUDIO>;
                        };
+
+                       arb: reset-controller@280 {
+                               compatible = "amlogic,meson-axg-audio-arb";
+                               reg = <0x0 0x280 0x0 0x4>;
+                               #reset-cells = <1>;
+                               clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
+                       };
                };
 
                cbus: bus@ffd00000 {
-- 
2.17.1

Reply via email to