2018-07-25 5:20 GMT+02:00 <alanx.chi...@intel.com>:
> From: Alan Chiang <alanx.chi...@intel.com>
>
> Currently the only way to use a variant of a supported model with
> a different address with a different address width is to define a
There's some copy-paste problem here. I fixed it.
> new compatible string and the corresponding chip data structure.
>
> Provide a flexible way to specify the size of the address pointer
> by defining a new property: address-width.
>
> Signed-off-by: Alan Chiang <alanx.chi...@intel.com>
> Signed-off-by: Andy Yeh <andy....@intel.com>
> Acked-by: Sakari Ailus <sakari.ai...@linux.intel.com>
> Reviewed-by: Rob Herring <r...@kernel.org>
> ---
> Documentation/devicetree/bindings/eeprom/at24.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt
> b/Documentation/devicetree/bindings/eeprom/at24.txt
> index 61d833a..aededdb 100644
> --- a/Documentation/devicetree/bindings/eeprom/at24.txt
> +++ b/Documentation/devicetree/bindings/eeprom/at24.txt
> @@ -72,6 +72,8 @@ Optional properties:
>
> - wp-gpios: GPIO to which the write-protect pin of the chip is connected.
>
> + - address-width: number of address bits (one of 8, 16).
> +
> Example:
>
> eeprom@52 {
> --
> 2.7.4
>
Applied both to for-next.
Bart
