Thank you a lot for your comments, I will fix these in the next version of the patch.
Jan On 16 Jul 2018, at 18:11, Rob Herring <r...@kernel.org<mailto:r...@kernel.org>> wrote: On Thu, Jul 12, 2018 at 11:58:04AM +0000, Janek Kotas wrote: This patch adds a device tree platform driver description for Cadence UFS Controller. Bindings are not platform drivers… OK, I will fix it. Signed-off-by: Jan Kotas <j...@cadence.com<mailto:j...@cadence.com>> --- .../devicetree/bindings/ufs/cdns,ufshc.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt new file mode 100644 index 0000000..cb6d62a --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt @@ -0,0 +1,31 @@ +* Cadence Universal Flash Storage (UFS) Controller + +UFS nodes are defined to describe on-chip UFS host controllers. +Each UFS controller instance should have its own node. + +Required properties: +- compatible : compatible list, contains the following controller: + "cdns,ufshc" + complemented with the JEDEC version: + "jedec,ufs-2.0" + +- reg : address and length of the UFS register set +- interrupts : one interrupt mapping +- clocks : List of phandle and clock specifier pairs. +- clock-names : List of clock input name strings sorted in the same + order as the clocks property. "core" is mandatory. And phy? It depends on a type of the PHY. It’s not strictly needed by the driver. In simulation and emulation, it’s possible to run a system without proper M-PHY. I will clarify this. +- freq-table-hz : Array of <min max> operating frequencies stored in the same + order as the clocks property. If this property is not + defined or a value in the array is "0" then it is assumed + that the frequency is set by the parent clock or a + fixed rate clock source. Don't define again here. Just refer to the common definition. OK, I will change that. + +Example: + ufs@fd030000 { + compatible = "cdns,ufshc", "jedec,ufs-2.0"; + reg = <0xfd030000 0x10000>; + interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>; + freq-table-hz = <0 0>, <0 0>; + clocks = <&ufs_core_clk>, <&ufs_phy_clk>; + clock-names = "core_clk", "phy_clk"; Doesn’t match the doc. Thank you for spotting that, I will update the description. + }; -- 1.9.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org<mailto:majord...@vger.kernel.org> More majordomo info at https://urldefense.proofpoint.com/v2/url?u=http-3A__vger.kernel.org_majordomo-2Dinfo.html&d=DwIBAg&c=aUq983L2pue2FqKFoP6PGHMJQyoJ7kl3s3GZ-_haXqY&r=g7GAQENVXx_RQdyXHInPMg&m=R_EUv1Z1yM7_QDIZjokueFORr12rFyao5RlUAfCrzLw&s=Yzxo2-ulc1GSkM0hRWzAMsdAh7Ad_3ubuw-gPgeeAhw&e=
