Add a write memory barier after clock mux config and before the rest
of the csiphy config.

Signed-off-by: Todor Tomov <todor.to...@linaro.org>
---
 drivers/media/platform/qcom/camss/camss-csiphy.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c 
b/drivers/media/platform/qcom/camss/camss-csiphy.c
index b37e691..2a9adcd 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
@@ -364,6 +364,7 @@ static int csiphy_stream_on(struct csiphy_device *csiphy)
                val |= cfg->csid_id;
        }
        writel_relaxed(val, csiphy->base_clk_mux);
+       wmb();
 
        writel_relaxed(0x1, csiphy->base +
                       CAMSS_CSI_PHY_GLBL_T_INIT_CFG0);
-- 
2.7.4

Reply via email to