On Tue, Jul 24, 2018 at 08:30:03PM +0200, Marcus Folkesson wrote: > MCP3911 is a dual channel Analog Front End (AFE) containing two > synchronous sampling delta-sigma Analog-to-Digital Converters (ADC). > > Signed-off-by: Marcus Folkesson <marcus.folkes...@gmail.com> > Signed-off-by: Kent Gustavsson <k...@minoris.se> > --- > > Notes: > v2: > - drop channel width > - drop `external_vref` > - replace `external-clock` with proper clock bindings > > .../devicetree/bindings/iio/adc/mcp3911.txt | 28 > ++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/iio/adc/mcp3911.txt > > diff --git a/Documentation/devicetree/bindings/iio/adc/mcp3911.txt > b/Documentation/devicetree/bindings/iio/adc/mcp3911.txt > new file mode 100644 > index 000000000000..af5472f51a84 > --- /dev/null > +++ b/Documentation/devicetree/bindings/iio/adc/mcp3911.txt > @@ -0,0 +1,28 @@ > +* Microchip MCP3911 Dual channel analog front end (ADC) > + > +Required properties: > + - compatible: Should be "microchip,mcp3911" > + - reg: SPI chip select number for the device > + > +Recommended properties: > + - spi-max-frequency: Definition as per > + Documentation/devicetree/bindings/spi/spi-bus.txt. > + Max frequency for this chip is 20MHz. > + > +Optional properties: > + - device-addr: Device address when multiple MCP3911 chips are present on the > + same SPI bus. Valid values are 0-3. Defaults to 0.
Isn't this the reg value? > + - vref-supply: Phandle to the external reference voltage supply. > + - clocks: Phandle and clock identifier (see clock-names) > + - clock-names: "adc_clk" for the ADC (sampling) clock Datasheet calls this clki (or mclk internally). Or just drop clock-names as it is pointless when there is only 1 clock. Also DR handling as an IRQ is missing.