> -----Original Message-----
> From: Scott Wood [mailto:[email protected]]
> Sent: Wednesday, August 8, 2018 2:44 AM
> To: Bharat Bhushan <[email protected]>;
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: [email protected]; [email protected]; [email protected];
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> Subject: Re: [RFC 5/5] powerpc/fsl: Add supported-irq-ranges for P2020
>
> On Fri, 2018-07-27 at 15:18 +0530, Bharat Bhushan wrote:
> > MPIC on NXP (Freescale) P2020 supports following irq
> > ranges:
> > > 0 - 11 (External interrupt)
> > > 16 - 79 (Internal interrupt)
> > > 176 - 183 (Messaging interrupt)
> > > 224 - 231 (Shared message signaled interrupt)
>
> Why don't you convert to the 4-cell interrupt specifiers that make dealing
> with these ranges less error-prone?
Ok , will do if we agree to have this series as per comment on other patch.
>
> > diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> > b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> > index 1006950..49ff348 100644
> > --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> > +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> > @@ -57,6 +57,11 @@ void __init mpc85xx_rdb_pic_init(void)
> > MPIC_BIG_ENDIAN |
> > MPIC_SINGLE_DEST_CPU,
> > 0, 256, " OpenPIC ");
> > + } else if (of_machine_is_compatible("fsl,P2020RDB-PC")) {
> > + mpic = mpic_alloc(NULL, 0,
> > + MPIC_BIG_ENDIAN |
> > + MPIC_SINGLE_DEST_CPU,
> > + 0, 0, " OpenPIC ");
> > } else {
> > mpic = mpic_alloc(NULL, 0,
> > MPIC_BIG_ENDIAN |
>
> I don't think we want to grow a list of every single revision of every board
> in
> these platform files.
One other confusing observation I have is that "irq_count" from platform code
is given precedence over "last-interrupt-source" in device-tree.
Should not device-tree should have precedence otherwise there is no point using
" last-interrupt-source" if platform code passes "irq_count" in mpic_alloc().
Thanks
-Bharat
>
> -Scott
