> -----Original Message----- > From: Paolo Bonzini [mailto:[email protected]] > Sent: Monday, August 20, 2018 6:16 PM > To: Liu, Jingqi <[email protected]>; [email protected]; > [email protected]; > [email protected]; [email protected] > Cc: [email protected]; [email protected]; [email protected]; Wang, > Wei W <[email protected]> > Subject: Re: [PATCH 1/3] KVM: x86: expose UMWAIT/UMONITOR/TPAUSE CPU > features into VM. > > On 10/07/2018 10:54, Jingqi Liu wrote: > > UMONITOR, UMWAIT, and TPAUSE are a set of user wait instructions. > > > > UMONITOR arms address monitoring hardware using an address. A store to > > an address within the specified address range triggers the monitoring > > hardware to wake up the processor waiting in umwait. > > > > UMWAIT instructs the processor to enter an implementation-dependent > > optimized state while monitoring a range of addresses. The optimized > > state may be either a light-weight power/performance optimized state > > (c0.1 state) or an improved power/performance optimized state > > (c0.2 state). > > > > TPAUSE instructs the processor to enter an implementation-dependent > > optimized state c0.1 or c0.2 state and wake up when time-stamp counter > > reaches specified timeout. > > > > Availability of the user wait instructions is indicated by the > > presence of the CPUID feature flag WAITPKG CPUID.0x07.0x0:ECX[5]. > > > > This patch exposes the umonitor,umwait, and tpause features to the guest. > > > > The release document ref below link: > > https://software.intel.com/sites/default/files/managed/c5/15/\ > > architecture-instruction-set-extensions-programming-reference.pdf > > This patch has a dependency on https://lkml.org/lkml/2018/6/15/657. > > > > Signed-off-by: Jingqi Liu <[email protected]> > > Hi Jingqi, you also need to track and save/restore IA32_UMWAIT_CONTROL.
Yes, I'll handle IA32_UMWAIT_CONTROL in the second version. Thanks for your review. > > Thanks, > > Paolo > > > --- > > arch/x86/kvm/cpuid.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index > > 7e042e3..e16c05e 100644 > > --- a/arch/x86/kvm/cpuid.c > > +++ b/arch/x86/kvm/cpuid.c > > @@ -406,7 +406,7 @@ static inline int __do_cpuid_ent(struct > kvm_cpuid_entry2 *entry, u32 function, > > F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | > > F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) > | > > F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | > F(AVX512_BITALG) | > > - F(CLDEMOTE); > > + F(CLDEMOTE) | F(WAITPKG); > > > > /* cpuid 7.0.edx*/ > > const u32 kvm_cpuid_7_0_edx_x86_features = > >
