On Tue, Aug 28, 2018 at 12:58 PM <sunil.kovv...@gmail.com> wrote:
>
> From: Geetha sowjanya <gak...@marvell.com>
>
> HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> create a IOMMU mapping for the physcial address configured by
> firmware and reconfig RVU_AF_MSIXTR_BASE with IOVA.
>
> Signed-off-by: Geetha sowjanya <gak...@marvell.com>
> Signed-off-by: Sunil Goutham <sgout...@marvell.com>
I think this needs some more explanation. What is the difference between
the MSI-X support in this driver and every other one? Are you working
around a hardware bug, or is there something odd in the implementation
of your irqchip driver? Do you use a GIC to handle the MSI interrupts
or something else?
Arnd
