On Wed, 27 Jun 2007, Linus Torvalds wrote: > On Wed, 27 Jun 2007, Davide Libenzi wrote: > > > On Wed, 27 Jun 2007, Linus Torvalds wrote: > > > > > > Stores never "leak up". They only ever leak down (ie past subsequent > > > loads > > > or stores), so you don't need to worry about them. That's actually > > > already > > > documented (although not in those terms), and if it wasn't true, then we > > > couldn't do the spin unlock with just a regular store anyway. > > > > Yes, Intel has never done that. They'll probably never do it since it'll > > break a lot of system software (unless they use a new mode-bit that > > allows system software to enable lose-ordering). Although I clearly > > remember to have read in one of their P4 optimization manuals to not > > assume this in the future. > > That optimization manual was confused. > > The Intel memory ordering documentation *clearly* states that only reads > pass writes, not the other way around.
Yes, they were stating that clearly. IIWNOC (If I Were Not On Crack) I remember them saying to not assume any ordering besides the data dependency and the CPU self-consistency in the future CPUs, and to use *fence instructions when certain semantics were required. But google did not help me in finding that doc, so maybe I were really on crack :) - Davide - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
