On Tue, Sep 04, 2018 at 04:22:24PM -0700, Venkata Narendra Kumar Gutta wrote:
> From: Channagoud Kadabi <ckad...@codeaurora.org>
>
> Add error reporting driver for Single Bit Errors (SBEs) and Double Bit
> Errors (DBEs). As of now, this driver supports error reporting for
> Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts
> are triggered when the errors happen in the cache, the driver handles
> those interrupts and dumps the syndrome registers.
>
> Signed-off-by: Channagoud Kadabi <ckad...@codeaurora.org>
> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgu...@codeaurora.org>
> Co-developed-by: Venkata Narendra Kumar Gutta <vnkgu...@codeaurora.org>
> ---
> MAINTAINERS | 8 +
> drivers/edac/Kconfig | 14 ++
> drivers/edac/Makefile | 1 +
> drivers/edac/qcom_edac.c | 420
> +++++++++++++++++++++++++++++++++++++
> include/linux/soc/qcom/llcc-qcom.h | 24 +++
> 5 files changed, 467 insertions(+)
> create mode 100644 drivers/edac/qcom_edac.c
EDAC bits look ok now, feel free to carry it through the qualcomm tree:
Acked-by: Borislav Petkov <b...@suse.de>
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
