There's apparently four of them on a MMP2.

Changes since v1:
- The controllers seem to be on AXI bus, not APB. Move them.
- Remove aliases.

Cc: Eric Miao <eric.y.m...@gmail.com>
Cc: Haojian Zhuang <haojian.zhu...@gmail.com>
Cc: Rob Herring <robh...@kernel.org>
Cc: Mark Rutland <mark.rutl...@arm.com>
Signed-off-by: Lubomir Rintel <lkund...@v3.sk>
---
 arch/arm/boot/dts/mmp2.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 766bbb8495b6..ac48d596976c 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -117,6 +117,42 @@
                                reg-names = "mux status", "mux mask";
                                mrvl,intc-nr-irqs = <2>;
                        };
+
+                       mmc1: mmc@d4280000 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4280000 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH0>;
+                               clock-names = "io";
+                               interrupts = <39>;
+                               status = "disabled";
+                       };
+
+                       mmc2: mmc@d4280800 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4280800 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH1>;
+                               clock-names = "io";
+                               interrupts = <52>;
+                               status = "disabled";
+                       };
+
+                       mmc3: mmc@d4281000 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4281000 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH2>;
+                               clock-names = "io";
+                               interrupts = <53>;
+                               status = "disabled";
+                       };
+
+                       mmc4: mmc@d4288000 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4281800 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH3>;
+                               clock-names = "io";
+                               interrupts = <54>;
+                               status = "disabled";
+                       };
                };
 
                apb@d4000000 {  /* APB */
-- 
2.17.1

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