Commit-ID: 2647c43c7f3ba4b752bfce261d53b16e2f5bc9e3
Gitweb: https://git.kernel.org/tip/2647c43c7f3ba4b752bfce261d53b16e2f5bc9e3
Author: Mike Travis <mike.tra...@hpe.com>
AuthorDate: Tue, 2 Oct 2018 13:01:46 -0500
Committer: Thomas Gleixner <t...@linutronix.de>
CommitDate: Tue, 2 Oct 2018 21:29:16 +0200
x86/tsc: Fix UV TSC initialization
The recent rework of the TSC calibration code introduced a regression on UV
systems as it added a call to tsc_early_init() which initializes the TSC
ADJUST values before acpi_boot_table_init(). In the case of UV systems,
that is a necessary step that calls uv_system_init(). This informs
tsc_sanitize_first_cpu() that the kernel runs on a platform with async TSC
resets as documented in commit 341102c3ef29 ("x86/tsc: Add option that TSC
on Socket 0 being non-zero is valid")
Fix it by skipping the early tsc initialization on UV systems and let TSC
init tests take place later in tsc_init().
Fixes: cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once")
Suggested-by: Hedi Berriche <hedi.berri...@hpe.com>
Signed-off-by: Mike Travis <mike.tra...@hpe.com>
Signed-off-by: Thomas Gleixner <t...@linutronix.de>
Reviewed-by: Russ Anderson <r...@hpe.com>
Reviewed-by: Dimitri Sivanich <sivan...@hpe.com>
Cc: "H. Peter Anvin" <h...@zytor.com>
Cc: Russ Anderson <russ.ander...@hpe.com>
Cc: Dimitri Sivanich <dimitri.sivan...@hpe.com>
Cc: Borislav Petkov <b...@alien8.de>
Cc: Kate Stewart <kstew...@linuxfoundation.org>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Philippe Ombredanne <pombreda...@nexb.com>
Cc: Pavel Tatashin <pasha.tatas...@oracle.com>
Cc: Peter Zijlstra <pet...@infradead.org>
Cc: Len Brown <len.br...@intel.com>
Cc: Dou Liyang <douly.f...@cn.fujitsu.com>
Cc: Xiaoming Gao <gxm.linux.ker...@gmail.com>
Cc: Rajvi Jingar <rajvi.jin...@intel.com>
Link:
https://lkml.kernel.org/r/20181002180144.923579...@stormcage.americas.sgi.com
---
arch/x86/kernel/tsc.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 6490f618e096..b52bd2b6cdb4 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -26,6 +26,7 @@
#include <asm/apic.h>
#include <asm/intel-family.h>
#include <asm/i8259.h>
+#include <asm/uv/uv.h>
unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */
EXPORT_SYMBOL(cpu_khz);
@@ -1433,6 +1434,9 @@ void __init tsc_early_init(void)
{
if (!boot_cpu_has(X86_FEATURE_TSC))
return;
+ /* Don't change UV TSC multi-chassis synchronization */
+ if (is_early_uv_system())
+ return;
if (!determine_cpu_tsc_frequencies(true))
return;
loops_per_jiffy = get_loops_per_jiffy();
