> -----Original Message-----
> From: Borislav Petkov <[email protected]>
> Sent: Friday, October 5, 2018 4:31 PM
> To: Moger, Babu <[email protected]>
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; Hurwitz, Sherry <[email protected]>;
> Lendacky, Thomas <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]
> Subject: Re: [PATCH v2 10/11] arch/x86: Add AMD feature bit
> X86_FEATURE_MBA in cpuid bits array
>
> On Fri, Oct 05, 2018 at 08:56:09PM +0000, Moger, Babu wrote:
> > From: Sherry Hurwitz <[email protected]>
> >
> > The feature bit X86_FEATURE_MBA is detected via CPUID leaf 0x80000008
> > EBX Bit 06. This bit indicates the support of AMD's MBA feature.
> >
> > This feature is supported by both Intel and AMD. But they are detected
> > different CPUID leaves.
> >
> > Signed-off-by: Babu Moger <[email protected]>
> > Signed-off-by: Sherry Hurwitz <[email protected]>
>
> This SOB chain should be the other way around - first Sherry, then you.
Sure. Will change it.
>
> > ---
> > arch/x86/kernel/cpu/scattered.c | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kernel/cpu/scattered.c
> b/arch/x86/kernel/cpu/scattered.c
> > index 772c219b6889..bd7853334b27 100644
> > --- a/arch/x86/kernel/cpu/scattered.c
> > +++ b/arch/x86/kernel/cpu/scattered.c
> > @@ -17,7 +17,11 @@ struct cpuid_bit {
> > u32 sub_leaf;
> > };
> >
> > -/* Please keep the leaf sorted by cpuid_bit.level for faster search. */
> > +/*
> > + * Please keep the leaf sorted by cpuid_bit.level for faster search.
> > + * X86_FEATURE_MBA supported by both Intel and AMD. But the cpuid
> > + * levels are different. Add a separate enty for each.
> > + */
> > static const struct cpuid_bit cpuid_bits[] = {
> > { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 },
> > { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 },
> > @@ -29,6 +33,7 @@ static const struct cpuid_bit cpuid_bits[] = {
> > { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
> > { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
> > { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },
> > + { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 },
> > { X86_FEATURE_SME, CPUID_EAX, 0, 0x8000001f, 0 },
> > { X86_FEATURE_SEV, CPUID_EAX, 1, 0x8000001f, 0 },
> > { 0, 0, 0, 0, 0 }
> > --
>
> With that fixed:
>
> Reviewed-by: Borislav Petkov <[email protected]>
>
Thanks
> --
> Regards/Gruss,
> Boris.
>
> Good mailing practices for 400: avoid top-posting and trim the reply.
