Hi Philipp Thanks for the quicks response....
> -----Original Message----- > From: Philipp Zabel [mailto:p.za...@pengutronix.de] > Sent: Friday, October 19, 2018 2:33 PM > To: Nava kishore Manne <na...@xilinx.com>; robh...@kernel.org; > mark.rutl...@arm.com; Michal Simek <mich...@xilinx.com>; Rajan Vaja > <raj...@xilinx.com>; Jolly Shah <jol...@xilinx.com>; > devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux- > ker...@vger.kernel.org; chinnikishore...@gmail.com > Subject: Re: [PATCH 3/3] reset: reset-zynqmp: Adding support for Xilinx > zynqmp reset controller. > > Hi Nava, > > On Sat, 2018-10-20 at 14:11 +0530, Nava kishore Manne wrote: > > Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC. > > The zynqmp reset-controller has the ability to reset lines connected > > to different blocks and peripheral in the Soc. > > > > Signed-off-by: Nava kishore Manne <nava.ma...@xilinx.com> > > --- > > Changes for v1: > > -None. > > I had comments on RFC v3 that are not addressed yet, see below. > Sorry, I have missed your comments . Will fix in the next version. Regards, Navakishore.
