On Tue, Sep 18, 2018 at 12:02 PM Andy Lutomirski <l...@kernel.org>
> On Tue, Sep 18, 2018 at 4:09 PM Chang S. Bae <chang.seok....@intel.com>
> wrote:
> >
> > With new helpers, FS/GS base access is centralized.
> > Eventually, when FSGSBASE instruction enabled, it will be faster.
>
> Sorry for not catching this during review, but:
>
> > +void x86_fsbase_write_cpu(unsigned long fsbase) {
> > + /*
> > + * Set the selector to 0 as a notion, that the segment base is
> > + * overwritten, which will be checked for skipping the segment load
> > + * during context switch.
> > + */
> > + loadseg(FS, 0);
>
> ^^^
>
> what?
>
> > + wrmsrl(MSR_FS_BASE, fsbase);
> > +}
>
> I don't understand what the comment is trying to say, but the sole caller so
> far
> of this function is x86_gsbase_write_task(), and the code looks incorrect.
>
> Ingo, I think we need to address this during this merge window, probably by
> removing the comment and the loadseg() call (and the same for
> gsbase...inactive). But first, Chang, can you explain what exactly your
> intent is
> here?
It's coming from do_arch_prctl_64(). If you think it really makes confusion in
x86_fsbase_write_cpu(), how about moving it to x86_fsbase_write_task()?
Chang
