On 10/25/18 5:38 PM, Thierry Reding wrote: > On Sun, Oct 21, 2018 at 09:30:52PM +0300, Dmitry Osipenko wrote: >> Introduce driver for the External Memory Controller (EMC) found on Tegra20 >> chips, which controls the external DRAM on the board. The purpose of this >> driver is to program memory timing for external memory on the EMC clock >> rate change. >> >> Signed-off-by: Dmitry Osipenko <dig...@gmail.com> >> Acked-by: Peter De Schrijver <pdeschrij...@nvidia.com> >> --- >> drivers/memory/tegra/Kconfig | 10 + >> drivers/memory/tegra/Makefile | 1 + >> drivers/memory/tegra/tegra20-emc.c | 591 +++++++++++++++++++++++++++++ >> 3 files changed, 602 insertions(+) >> create mode 100644 drivers/memory/tegra/tegra20-emc.c > > Applied to for-4.21/memory, thanks.
Thank you! > Though I did notice that there's quite a bit of code that's very similar > between this and the existing Tegra124 driver, so I wonder if we can do > a pass over them and refactor some of it as a follow-up. I don't think this will really worth the effort.