[PATCH v1 1/1] pinctrl: nuvoton: modify NPCM7xx pin configuration function

[Tomer Maimon]

Modify GPIO direction setting in pin configuration function by using
generic GPIO functions to set the GPIO direction instead of direct
access to the GPIO direction register.

Signed-off-by: Tomer Maimon <tmaimo...@gmail.com>
---
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c 
b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
index 7ad50d9268aa..b455209382a5 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
@@ -1799,19 +1799,12 @@ static int npcm7xx_config_set_one(struct 
npcm7xx_pinctrl *npcm,
                npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_PU, gpio);
                break;
        case PIN_CONFIG_INPUT_ENABLE:
-               if (arg) {
-                       iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
-                       npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
-                                     gpio);
-               } else
-                       npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
-                                     gpio);
+               iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
+               bank->direction_input(&bank->gc, pin % bank->gc.ngpio);
                break;
        case PIN_CONFIG_OUTPUT:
-               npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM, gpio);
-               iowrite32(gpio, arg ? bank->base + NPCM7XX_GP_N_DOS :
-                         bank->base + NPCM7XX_GP_N_DOC);
                iowrite32(gpio, bank->base + NPCM7XX_GP_N_OES);
+               bank->direction_output(&bank->gc, pin % bank->gc.ngpio, arg);
                break;
        case PIN_CONFIG_DRIVE_PUSH_PULL:
                npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_OTYP, gpio);
-- 
2.14.1