Commit-ID: 08e823c2c5899ef2de3aa1727233f1f19e8c1cc1 Gitweb: https://git.kernel.org/tip/08e823c2c5899ef2de3aa1727233f1f19e8c1cc1 Author: Janakarajan Natarajan <[email protected]> AuthorDate: Wed, 7 Nov 2018 20:59:07 +0000 Committer: Borislav Petkov <[email protected]> CommitDate: Wed, 7 Nov 2018 22:21:03 +0100
x86/cpufeatures: Add WBNOINVD feature definition Add a new cpufeature definition for the WBNOINVD instruction. The WBNOINVD instruction writes all modified cache lines in all levels of the cache associated with a processor to main memory while retaining the cached values. Both AMD and Intel support this instruction. Signed-off-by: Janakarajan Natarajan <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> CC: David Woodhouse <[email protected]> CC: Fenghua Yu <[email protected]> CC: "H. Peter Anvin" <[email protected]> CC: Ingo Molnar <[email protected]> CC: Konrad Rzeszutek Wilk <[email protected]> CC: Rudolf Marek <[email protected]> CC: Thomas Gleixner <[email protected]> CC: x86-ml <[email protected]> Link: http://lkml.kernel.org/r/[email protected] --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 28c4a502b419..39a48f06d39d 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -281,6 +281,7 @@ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */ +#define X86_FEATURE_WBNOINVD (13*32+ 9) /* WBNOINVD instruction */ #define X86_FEATURE_AMD_IBPB (13*32+12) /* "" Indirect Branch Prediction Barrier */ #define X86_FEATURE_AMD_IBRS (13*32+14) /* "" Indirect Branch Restricted Speculation */ #define X86_FEATURE_AMD_STIBP (13*32+15) /* "" Single Thread Indirect Branch Predictors */
