reviewed-by: Minghuan Lian <[email protected]>
> -----Original Message----- > From: Z.q. Hou > Sent: Tuesday, November 20, 2018 5:27 PM > To: [email protected]; [email protected]; > [email protected]; [email protected]; > [email protected]; [email protected]; [email protected]; > [email protected]; [email protected]; Leo Li > <[email protected]>; [email protected]; > [email protected]; [email protected] > Cc: Mingkai Hu <[email protected]>; M.h. Lian > <[email protected]>; Xiaowei Bao <[email protected]>; Z.q. Hou > <[email protected]> > Subject: [PATCHv2 14/25] PCI: mobiveil: initialize > Primary/Secondary/Subordinate bus number > > From: Hou Zhiqiang <[email protected]> > > The reset value is all zero, so set a workable value for Primary, Secondary > and Subordinate bus numbers. > > Signed-off-by: Hou Zhiqiang <[email protected]> > --- > V2: > - no change > > drivers/pci/controller/pcie-mobiveil.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/pci/controller/pcie-mobiveil.c > b/drivers/pci/controller/pcie-mobiveil.c > index db7ecb021c63..9210165fe8c0 100644 > --- a/drivers/pci/controller/pcie-mobiveil.c > +++ b/drivers/pci/controller/pcie-mobiveil.c > @@ -582,6 +582,12 @@ static int mobiveil_host_init(struct mobiveil_pcie > *pcie) > u32 value, pab_ctrl, type; > struct resource_entry *win; > > + /* setup bus numbers */ > + value = csr_readl(pcie, PCI_PRIMARY_BUS); > + value &= 0xff000000; > + value |= 0x00ff0100; > + csr_writel(pcie, value, PCI_PRIMARY_BUS); > + > /* > * program Bus Master Enable Bit in Command Register in PAB Config > * Space > -- > 2.17.1
